In line with National Science and Technology Council (NSTC) Minister Tsung-Tsong Wu's recent announcement that one of the Council's eight frontier research platforms shall be dedicated to semiconductor and quantum technology, NSTC has launched the 2025 Large-Scale Semiconductor Research Plan, which lays out a decade-long plan for talent training and R&D in the semiconductor industry. Together with the Ministry of Education and the Ministry of Economic Affairs, NSTC will work to cultivate talent and link industries.
NSTC not only fully supports the academic community in conducting top-notch semiconductor-related research, but also provides directives to the Taiwan Semiconductor Research Institute (TSRI) of NARLabs to develop various platforms to assist the academic community in developing cutting-edge chips. In its implementation of NSTC policy, TSRI has now developed the Custom System-on-Chip Design Platform. The platform is concentrated on the R&D of application-specific circuits, the key technology in a system-on-chip (SoC), and allows researchers to transform ideas into complete systems-on-chips.
Tech Giants' Self-Developed Chips Become Mainstream
As emerging applications demand higher and higher performance from computing hardware, the trend of independently developing customized systems-on-chips has reached new heights. For example, Apple's Mac series products use Apple's own M1 and M2 chips. Google's self-designed Tensor chips are used in Pixel series phones. Amazon develops Graviton chips to enhance Amazon Web Services (AWS) cloud computing. In addition, Tesla develops Dojo chips for cloud machine-learning training and autonomous vehicles.
Although demand for custom SoC design is growing strong, the R&D process involves not only coming up with creative ideas and drawing up system specifications for the chips, but also circuit system planning, design, testing, debugging, and adjustment, which is complex, time-consuming, and labor-intensive. Moreover, chips taped out for manufacturing lack the display system to directly check real audio and video signals. In short, the complexity of the design process, the time-consuming testing process, and the lack of a display system are challenges that raise the design threshold for custom systems-on-chips and slow down development.
Custom System-on-Chip Design Platform Accelerates Implementation
To accelerate the R&D of custom systems-on-chips in Taiwan's research community, TSRI has developed the Custom System-on-Chip Design Platform. The platform is concentrated on the R&D of application-specific circuits, the key SoC technology, and allows researchers to transform ideas into complete systems-on-chips.
The platform also features ASIC1 and FPGA2 functions. While researchers use the platform, TSRI will provide a professional chip design service team to make up for any lack of experience in chip back-end implementation and accelerate the completion of the complex design process. With experienced TSRI engineers helping with design and debugging, researchers can efficiently create high-performance, low-power chips and reduce the cost incurred due to unfamiliarity with advanced process design regulations. It is estimated that through the platform, the material and fabrication cost of each design can be reduced by 30%, from NT$3 million to NT$2 million.
In addition, with the help of experienced TSRI professionals, testing and debugging of the more than 3 billion transistors in complex chips can be accelerated, helping researchers reduce testing time and software simulation time, which would have originally taken days to weeks, down to just 40 minutes, significantly saving time and effort.
Lastly, since the platform is able to support display systems, all that is necessary is to install the tape-out prototype chip into the chip outlet on the platform and load software image files to run applications such as object detection or image segmentation. Rather than adhere to the usual practice of separately developing system boards for display purposes, TSRI helps researchers bypass this hurdle, reducing development time by at least six months.
ISSCC Conference Presentations with NTU
TSRI's Custom System-on-Chip Design Platform can support various applications, including AI vision, speech processing, biomedical chips, and autonomous vehicles. Research teams from National Taiwan University (NTU) and National Yang Ming Chiao Tung University are already using the platform for development of biomedical chips, self-driving cars, and smart robots.
Professor Chia-Hsiang Yang from the NTU Department of Electrical Engineering, his research team, and TSRI have used the platform to design, test, and display three custom systems-on-chips: the "AI Computing Acceleration Chip," which can accelerate computation by four to six times; the "Seven-axis Autonomous Mobile Robot Motion Control Chip," which can increase maximum motion control frequency by 22 times and energy efficiency by 350 times more than recorded in past literature, and the "Next-generation Genetic Sequencing Data Analysis Chip," which is the first in the world to achieve gene variant computation and can reduce analysis time from several days to half an hour or less. All three systems-on-chips were selected for presentation at the ISSCC and were highly recognized.
TSRI Director-General Tuo-Hung Hou stated that under the guidance of NSTC, TSRI has been committed to enhancing the research capabilities of Taiwan's industrial, academic, and research communities in semiconductor technology, as well as cultivating both quality and quantity of chip design professionals. Through the Custom System-on-Chip Design Platform, the research community can share resources, shorten development time for semiconductor technology and SoC design testing, accelerate the enhancement of technical capabilities, and produce top-notch results.
1 An ASIC (Application Specific Integrated Circuit) refers to a chip designed for application-specific or customer-specific needs. Not only are they more confidential and less costly, but are also highly customizable, so they can be designed to meet demand for smaller sizes, lighter weight, lower power consumption, and higher performance.
2 An FPGA (Field Programmable Gate Array) is a programmable logic chip designed for SoC debugging before tape-out for manufacturing. It can be re-programmed according to application and has a higher unit price than an ASIC.
