Along with the increasing demand for compact computer, mobile phone, digital camera or iPad with large storage capacity, flash memory has become the fastest growing semiconductor device on the market. However, the current mass production technology of flash memory is reaching its bottleneck. To beat the challenge, the NARL’s National Nano Device Laboratories (NDL) leads the world in developing the smallest 9nm half-pitch functional resistive random-access memory (RRAM) cell array that represents twenty times more storage capacity but only one of two hundredth power consumption compared to current flash memory. This new memory is capable of storing text data of an entire library within the area of one square centimeter with minimum power consumption. And its capacity can be further expanded by the three-dimensional stacking design, which leads to unlimited possibility for the miniaturization of information electronic products.
The research result of “9nm half-pitch functional resistive random access memory (RRAM)” was released in the 2010 IEEE International Electron Devices Meeting (IEDM) in San Francisco, CA, USA from December 6-8, 2010. The IEEE/IEDM is the world's main forum for reporting breakthroughs in semiconductors and other electronic devices, and its 2010 meeting, with more than 1,500 researchers attended, has chosen the NARL-NDL’s finding as one of the featured theses that was also covered by Low Power Engineering Community, Nihon Keizai Shimbun (BP) and other media.
The NARL-NDL’s research team on the record 9nm half-pitch functional RRAM, headed by Chia-Hua Ho, applied innovative technology to change the chemical composition of the tungsten-oxide layers in RRAM and added voltage to move oxygen atoms in very short distance so that tungsten-oxide layers keep piling up to increase the storage capacity even greater. This new technology produces memory device of only a few nanometers with greatly reduced process steps, cost and power consumption. And this feat is a significant breakthrough of the technology bottleneck of memory smaller than 10 nanometers, as well as a major step forward for the development of Taiwan’s nano-device technology.
This new microchip technology is estimated to start the mass production in five to ten years. By then it may generate millions of dollars in global market. In this connection, the NARL-NDL is planning to establish the “Consortium of 16-8 nanometer devices” together with industrial, academic, and research sectors. The consortium is to serve as a platform for accelerating the development of CMOS device and memory device technologies based on the recent achievements in nanotechnology, and for facilitating the development of human resources in semiconductor industry.
